1) Which is the an alternative mechanism of preventing the software to be dependent on several delay factors along with an optimum time proficiency of checking LCD status at the interfacing level?
a. Polling of DB7 bit of the data bus
b. Updating the faster display in less time
c. Generalization of clock frequency and display module
d. All of the above
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2) What is the purpose of using Schmitt Trigger in the hardware circuit for key debouncing?
a. Noise Elimination
b. Improvement in Noise Immunity
c. Increase in Noise Figure
d. Reduction in Noise Temperature
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3) Which lines are driven low under the software control during interfacing HEX keyboard with PIC 16F877?
a. Scan Lines
b. Return Lines
c. Both a & b
d. None of the above
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4) Which keys are encoded for scan lines with '1101' value (RB1 low) condition?
a. 0, 4, 8, C
b. 1, 5, 9, D
c. 2, 6, A, E
d. 3, 7, B, F
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5) What value of 'B' should be loaded in the TRISB register if return lines (RB7:RB4) and RB3:RB0 are supposed to be inputs and outputs respectively after the PORT B initialization?
a. 11000100
b. 11110011
c. 11110001
d. 11110000
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6) Which pin should be set low along with the program counter contents more than 0FFFH for accessing the external program memory?
a. EA
b. ALE
c. PSEN
d. All of the above
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7) Which essential operation should be performed while reading the external program byte on the data bus?
a. Latching of lower address byte
b. Latching of higher address byte
c. Latching of any addressable byte irrespective of priority level
d. None of the above
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8) Which bus/es acquire/s the potential of liberally receiving the code byte after addressing the lower order address byte?
a. Data bus
b. Address bus
c. Both a & b
d. None of the above
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9) What happens when the RD signal becomes low during the read cycle?
a. Data byte gets loaded from external data memory to data bus
b. Address byte gets loaded from external data memory to address bus
c. Data byte gets loaded from external program memory to data bus
d. Address byte gets loaded from external program memory to address bus
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Answer
Explanation
Related Ques
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ANSWER: Data byte gets loaded from external data memory to data bus
Explanation:
No explanation is available for this question!
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10) Which among the below mentioned memory components possessess the potential of generating an ALE signal for the latching purpose of lower address byte in an external data memory?
a. CPU
b. Data Bus
c. Port 0
d. Port 1
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11) Which ports assist in addressing lower order and higher address bytes into the data bus simultaneously, while accessing the external data memory?
a. Port 0 & Port 1 respectively
b. Port 1 & Port 2 respectively
c. Port 0 & Port 2 respectively
d. Port 2 & Port 3 respectively
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12) What happens when the latch is kept open once after the execution of the latch operation by allowing input digital data byte to appear at the output?
a. Variation in an input digital data
b. Output data remains constant despite changing input digital data
c. Variation in an output data with respect to input data variation
d. Cannot predict
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Answer
Explanation
Related Ques
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ANSWER: Output data remains constant despite changing input digital data
Explanation:
No explanation is available for this question!
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13) How is the latch interfacing with the microcontroller related to the number of digital output functions?
a. It increases the number of digital output functions in a time multiplexed manner
b. It decreases the number of digital output functions in a time multiplexed manner
c. It increases the number of digital output functions in a frequency multiplexed manner
d. It decreases the number of digital output functions in a frequency multiplexed manner
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Answer
Explanation
Related Ques
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ANSWER: It increases the number of digital output functions in a time multiplexed manner
Explanation:
No explanation is available for this question!
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14) What is the correct chronological order/sequence of steps associated with the latch operations given below?
a. Loading the data on output port
b. Increment in the digital output functions by using microcontroller pins
c. Application of latch enable signal to desired latch
a. A, B, C
b. A, C, B
c. C, A, B
d. B, A, C
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15) In an electromechanical relay, the necessity of connecting an external base resistance arises only _________
a. in the presence of an internal pull-up resistor
b. in the absence of an internal pull-up resistor
c. in the absence of an internal push-up resistor
d. in the presence of an internal push-up resistor
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Answer
Explanation
Related Ques
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ANSWER: in the absence of an internal pull-up resistor
Explanation:
No explanation is available for this question!
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16) Which diodes are employed in the electromechanical relays since the inductor current cannot be reduced to zero?
a. Tunnel Diode
b. Shockley Diode
c. Freewheeling Diode
d. Zener Diode
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17) Where do the power gets dissipated during the gradual decay of an inductor current (upto zero value) by turning OFF the transistor in an electromechanical relay?
a. Internal resistance of the coil
b. Internal Diode resistance
c. Both a & b
d. None of the above
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18) Which factors indicate the necessity of sample and hold circuit in the process of analog-to-digital conversion?
a. Instantaneous variation in an input signal
b. Analog-to-digital conversion time
c. Both a & b
d. None of the above
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19) Which pin/signal of ADC AD571 interfacing apprises about the accomplishment of data reading in the microcontroller so as to indicate ADC to get ready for the next data sample?
a. BLANK /CONVERT (high)
b. BLANK/DR (low)
c. DATA READY (DR)
d. All of the above
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20) Which errors are more likely to get generated by conversion time and ADC resolution respectively in accordance to the digital signal processing?
a. Sampling & Quantization Errors
b. Systematic & Random Errors
c. Overload & Underload Errors
d. None of the above
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21) What is the purpose of blanking (BI) associated with the 7-segment display operations?
a. To turn ON the display
b. To turn OFF the display
c. To pulse modulate the brightness of display
d. To pulse modulate the lightness of display
a. B & C
b. A & D
c. A & B
d. C & D
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22) How are the port pins of microcontroller calculated for time-multiplexing types of display?
a. 4 + number of digits to be displayed
b. 4 raised to the number of digits to be displayed
c. 4 - number of digits to be displayed
d. 4 x number of digits to be displayed
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23) What does the RAM location at 44H indicates about the seven segment code?
a. 7-segment code for the third character
b. 7-segment code for the fourth character
c. Display of select code for third display
d. Display of select code for fourth display
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